Test Generation of Crosstalk Delay Faults in VLSI Circuits
| By: | S. Jayanthy; M. C. Bhuvaneswari |
| Publisher: | Springer Nature |
| Print ISBN: | 9789811324925 |
| eText ISBN: | 9789811324932 |
| Edition: | 0 |
| Copyright: | 2019 |
| Format: | Reflowable |
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This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.